Recently, Kurdthongmee [13] reported the success of a
single moderate density FPGA implementation of a
K-SOM with a real-time performance and acceptable
image quality. The proposed architecture was based
wholly on unsigned integer arithmetic with an operator
sharing concept. The maximum obtainable colour palette
size was 128 9 2 or 256 colours when synthesized on a
single XC2VP100 FPGA device running at a maximum
frequency of 24 MHz. This was equivalent to a maximum
frame rate of 25 fps for an input image of resolution
640 9 480 pixels. As an extension to the architecture in
[13] which relied on using a winner-take-all (WTA)
scheme, Kurdthongmee [14] proposed a more hardware
centric K-SOM algorithm taking into account a topological
relationship among neural cells. This improved the
convergence rate of the K-SOM algorithm and, in turn,
increased the quality of a quantized image significantly.
Apart from only updating the winner neural cell, the
newly proposed algorithm updates its surrounding neighbours
with variable learning rates depending on their
relative distances with the winner neural cell. The
‘‘update-and-use’’ scheme was proposed and used in order
to guarantee that all neural cells were visited only once in
the weight update stage.