where I
DVS1,2.on
is the current sourced out of the DVS1,2 pins (50 µA typ.) and V
DVS1,2_TH
is the lower clamp voltage of the DVS1,2 pins (-0.2 V typ.).
This may enable the ON threshold to be set according to the SR power MOSFET
body diode VF
chosen for the application or the external diode connected in
parallel to the power MOSFET drain-source (e.g. Schottky rectifier).
The current sourcing out of the DVS1,2 pin is enabled after the drain-source
voltage experiences a voltage below the pre-triggering level V
DVS1,2_PT (negative going edge) and is disabled once the rectifier is switched on. A de-bouncing delay (TPD_ON) is introduced after the current generator is activated in order to avoid
false triggering of the gate driver.
In some applications, RD1,2 is also needed to limit the current that can be injected
into the DVS pins when the corresponding SR power MOSFET is off. In fact, when
one power MOSFET is off (and the other is conducting) its drain-to-source voltage
is slightly higher than twice the output voltage; if this exceeds the voltage rating of
the internal clamp (VccZ = 36 V typ.), RD1,2 has to limit the injected current below
the maximum rating (25 mA). In addition, the SRK2000 clamping circuit dissipation
must be taken into account to avoid device overheating. In this case, Equation 1 is
used to check that the resulting VTH.ON is compatible with the forward drop of the
SR power MOSFET body diode (or the parallel external diode).
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在這裡我
DVS1,2.on
是源出DVS1,2引腳的電流(50μA典型值)和V
DVS1,2_TH
是DVS1,2引腳(-0.2 V典型值)的低箝位電壓。
這可能使開啟閾值,以根據對SR功率MOSFET被設置
體二極管的VF
選擇用於連接在應用程序或外部二極管
並聯到功率MOSFET的漏源(如肖特基整流器)。
該電流源出DVS1,2銷的漏-源之後被啟用
電壓經歷低於預先觸發電平V的電壓
DVS1,2_PT(負沿),並且一旦整流器被接通處於關閉狀態。電流發生器,以避免活化之後被去彈跳延遲(TPD_ON)被引入
所述柵極驅動器的錯誤觸發。
在一些應用中,RD1,2也需要限制可注入的電流
進入的DVS銷時相應的SR功率MOSFET關斷。事實上,當
一個電源MOSFET關斷(以及其他被導通)的漏極-源極電壓
大於兩倍的輸出電壓稍高; 如果這個超過的額定電壓
的內部夾(VccZ = 36 V典型值),RD1,2具有限制下面的注入電流
的最大額定值(25 mA)的。此外,SRK2000箝位電路耗散
,必須加以考慮,以避免設備過熱。在這種情況下,等式1被
用來檢查所得到的VTH.ON與的正向壓降兼容
的SR功率MOSFET的體二極管(或平行外部二極管)。
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